aesni.c 18 KB

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  1. /*
  2. * AES-NI support functions
  3. *
  4. * Copyright The Mbed TLS Contributors
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Licensed under the Apache License, Version 2.0 (the "License"); you may
  8. * not use this file except in compliance with the License.
  9. * You may obtain a copy of the License at
  10. *
  11. * http://www.apache.org/licenses/LICENSE-2.0
  12. *
  13. * Unless required by applicable law or agreed to in writing, software
  14. * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
  15. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  16. * See the License for the specific language governing permissions and
  17. * limitations under the License.
  18. */
  19. /*
  20. * [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
  21. * [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
  22. */
  23. #include "common.h"
  24. #if defined(MBEDTLS_AESNI_C)
  25. #if defined(__has_feature)
  26. #if __has_feature(memory_sanitizer)
  27. #warning "MBEDTLS_AESNI_C is known to cause spurious error reports with some memory sanitizers as they do not understand the assembly code."
  28. #endif
  29. #endif
  30. #include "mbedtls/aesni.h"
  31. #include <string.h>
  32. #ifndef asm
  33. #define asm __asm
  34. #endif
  35. #if defined(MBEDTLS_HAVE_X86_64)
  36. /*
  37. * AES-NI support detection routine
  38. */
  39. int mbedtls_aesni_has_support( unsigned int what )
  40. {
  41. static int done = 0;
  42. static unsigned int c = 0;
  43. if( ! done )
  44. {
  45. asm( "movl $1, %%eax \n\t"
  46. "cpuid \n\t"
  47. : "=c" (c)
  48. :
  49. : "eax", "ebx", "edx" );
  50. done = 1;
  51. }
  52. return( ( c & what ) != 0 );
  53. }
  54. /*
  55. * Binutils needs to be at least 2.19 to support AES-NI instructions.
  56. * Unfortunately, a lot of users have a lower version now (2014-04).
  57. * Emit bytecode directly in order to support "old" version of gas.
  58. *
  59. * Opcodes from the Intel architecture reference manual, vol. 3.
  60. * We always use registers, so we don't need prefixes for memory operands.
  61. * Operand macros are in gas order (src, dst) as opposed to Intel order
  62. * (dst, src) in order to blend better into the surrounding assembly code.
  63. */
  64. #define AESDEC ".byte 0x66,0x0F,0x38,0xDE,"
  65. #define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF,"
  66. #define AESENC ".byte 0x66,0x0F,0x38,0xDC,"
  67. #define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD,"
  68. #define AESIMC ".byte 0x66,0x0F,0x38,0xDB,"
  69. #define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF,"
  70. #define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44,"
  71. #define xmm0_xmm0 "0xC0"
  72. #define xmm0_xmm1 "0xC8"
  73. #define xmm0_xmm2 "0xD0"
  74. #define xmm0_xmm3 "0xD8"
  75. #define xmm0_xmm4 "0xE0"
  76. #define xmm1_xmm0 "0xC1"
  77. #define xmm1_xmm2 "0xD1"
  78. /*
  79. * AES-NI AES-ECB block en(de)cryption
  80. */
  81. int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx,
  82. int mode,
  83. const unsigned char input[16],
  84. unsigned char output[16] )
  85. {
  86. asm( "movdqu (%3), %%xmm0 \n\t" // load input
  87. "movdqu (%1), %%xmm1 \n\t" // load round key 0
  88. "pxor %%xmm1, %%xmm0 \n\t" // round 0
  89. "add $16, %1 \n\t" // point to next round key
  90. "subl $1, %0 \n\t" // normal rounds = nr - 1
  91. "test %2, %2 \n\t" // mode?
  92. "jz 2f \n\t" // 0 = decrypt
  93. "1: \n\t" // encryption loop
  94. "movdqu (%1), %%xmm1 \n\t" // load round key
  95. AESENC xmm1_xmm0 "\n\t" // do round
  96. "add $16, %1 \n\t" // point to next round key
  97. "subl $1, %0 \n\t" // loop
  98. "jnz 1b \n\t"
  99. "movdqu (%1), %%xmm1 \n\t" // load round key
  100. AESENCLAST xmm1_xmm0 "\n\t" // last round
  101. "jmp 3f \n\t"
  102. "2: \n\t" // decryption loop
  103. "movdqu (%1), %%xmm1 \n\t"
  104. AESDEC xmm1_xmm0 "\n\t" // do round
  105. "add $16, %1 \n\t"
  106. "subl $1, %0 \n\t"
  107. "jnz 2b \n\t"
  108. "movdqu (%1), %%xmm1 \n\t" // load round key
  109. AESDECLAST xmm1_xmm0 "\n\t" // last round
  110. "3: \n\t"
  111. "movdqu %%xmm0, (%4) \n\t" // export output
  112. :
  113. : "r" (ctx->nr), "r" (ctx->rk), "r" (mode), "r" (input), "r" (output)
  114. : "memory", "cc", "xmm0", "xmm1" );
  115. return( 0 );
  116. }
  117. /*
  118. * GCM multiplication: c = a times b in GF(2^128)
  119. * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
  120. */
  121. void mbedtls_aesni_gcm_mult( unsigned char c[16],
  122. const unsigned char a[16],
  123. const unsigned char b[16] )
  124. {
  125. unsigned char aa[16], bb[16], cc[16];
  126. size_t i;
  127. /* The inputs are in big-endian order, so byte-reverse them */
  128. for( i = 0; i < 16; i++ )
  129. {
  130. aa[i] = a[15 - i];
  131. bb[i] = b[15 - i];
  132. }
  133. asm( "movdqu (%0), %%xmm0 \n\t" // a1:a0
  134. "movdqu (%1), %%xmm1 \n\t" // b1:b0
  135. /*
  136. * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
  137. * using [CLMUL-WP] algorithm 1 (p. 13).
  138. */
  139. "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0
  140. "movdqa %%xmm1, %%xmm3 \n\t" // same
  141. "movdqa %%xmm1, %%xmm4 \n\t" // same
  142. PCLMULQDQ xmm0_xmm1 ",0x00 \n\t" // a0*b0 = c1:c0
  143. PCLMULQDQ xmm0_xmm2 ",0x11 \n\t" // a1*b1 = d1:d0
  144. PCLMULQDQ xmm0_xmm3 ",0x10 \n\t" // a0*b1 = e1:e0
  145. PCLMULQDQ xmm0_xmm4 ",0x01 \n\t" // a1*b0 = f1:f0
  146. "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0
  147. "movdqa %%xmm4, %%xmm3 \n\t" // same
  148. "psrldq $8, %%xmm4 \n\t" // 0:e1+f1
  149. "pslldq $8, %%xmm3 \n\t" // e0+f0:0
  150. "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1
  151. "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0
  152. /*
  153. * Now shift the result one bit to the left,
  154. * taking advantage of [CLMUL-WP] eq 27 (p. 20)
  155. */
  156. "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0
  157. "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2
  158. "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1
  159. "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1
  160. "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63
  161. "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63
  162. "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63
  163. "pslldq $8, %%xmm3 \n\t" // r0>>63:0
  164. "pslldq $8, %%xmm4 \n\t" // r2>>63:0
  165. "psrldq $8, %%xmm5 \n\t" // 0:r1>>63
  166. "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1
  167. "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1
  168. "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63
  169. /*
  170. * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
  171. * using [CLMUL-WP] algorithm 5 (p. 20).
  172. * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
  173. */
  174. /* Step 2 (1) */
  175. "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0
  176. "movdqa %%xmm1, %%xmm4 \n\t" // same
  177. "movdqa %%xmm1, %%xmm5 \n\t" // same
  178. "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a
  179. "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b
  180. "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c
  181. /* Step 2 (2) */
  182. "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b
  183. "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c
  184. "pslldq $8, %%xmm3 \n\t" // a+b+c:0
  185. "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0
  186. /* Steps 3 and 4 */
  187. "movdqa %%xmm1,%%xmm0 \n\t" // d:x0
  188. "movdqa %%xmm1,%%xmm4 \n\t" // same
  189. "movdqa %%xmm1,%%xmm5 \n\t" // same
  190. "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0'
  191. "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0'
  192. "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0'
  193. "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0'
  194. "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0'
  195. // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
  196. // bits carried from d. Now get those\t bits back in.
  197. "movdqa %%xmm1,%%xmm3 \n\t" // d:x0
  198. "movdqa %%xmm1,%%xmm4 \n\t" // same
  199. "movdqa %%xmm1,%%xmm5 \n\t" // same
  200. "psllq $63, %%xmm3 \n\t" // d<<63:stuff
  201. "psllq $62, %%xmm4 \n\t" // d<<62:stuff
  202. "psllq $57, %%xmm5 \n\t" // d<<57:stuff
  203. "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff
  204. "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff
  205. "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d
  206. "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0
  207. "pxor %%xmm1, %%xmm0 \n\t" // h1:h0
  208. "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0
  209. "movdqu %%xmm0, (%2) \n\t" // done
  210. :
  211. : "r" (aa), "r" (bb), "r" (cc)
  212. : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5" );
  213. /* Now byte-reverse the outputs */
  214. for( i = 0; i < 16; i++ )
  215. c[i] = cc[15 - i];
  216. return;
  217. }
  218. /*
  219. * Compute decryption round keys from encryption round keys
  220. */
  221. void mbedtls_aesni_inverse_key( unsigned char *invkey,
  222. const unsigned char *fwdkey, int nr )
  223. {
  224. unsigned char *ik = invkey;
  225. const unsigned char *fk = fwdkey + 16 * nr;
  226. memcpy( ik, fk, 16 );
  227. for( fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16 )
  228. asm( "movdqu (%0), %%xmm0 \n\t"
  229. AESIMC xmm0_xmm0 "\n\t"
  230. "movdqu %%xmm0, (%1) \n\t"
  231. :
  232. : "r" (fk), "r" (ik)
  233. : "memory", "xmm0" );
  234. memcpy( ik, fk, 16 );
  235. }
  236. /*
  237. * Key expansion, 128-bit case
  238. */
  239. static void aesni_setkey_enc_128( unsigned char *rk,
  240. const unsigned char *key )
  241. {
  242. asm( "movdqu (%1), %%xmm0 \n\t" // copy the original key
  243. "movdqu %%xmm0, (%0) \n\t" // as round key 0
  244. "jmp 2f \n\t" // skip auxiliary routine
  245. /*
  246. * Finish generating the next round key.
  247. *
  248. * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
  249. * with X = rot( sub( r3 ) ) ^ RCON.
  250. *
  251. * On exit, xmm0 is r7:r6:r5:r4
  252. * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
  253. * and those are written to the round key buffer.
  254. */
  255. "1: \n\t"
  256. "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
  257. "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
  258. "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
  259. "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
  260. "pslldq $4, %%xmm0 \n\t" // etc
  261. "pxor %%xmm0, %%xmm1 \n\t"
  262. "pslldq $4, %%xmm0 \n\t"
  263. "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
  264. "add $16, %0 \n\t" // point to next round key
  265. "movdqu %%xmm0, (%0) \n\t" // write it
  266. "ret \n\t"
  267. /* Main "loop" */
  268. "2: \n\t"
  269. AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t"
  270. AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t"
  271. AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t"
  272. AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t"
  273. AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t"
  274. AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t"
  275. AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t"
  276. AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t"
  277. AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t"
  278. AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t"
  279. :
  280. : "r" (rk), "r" (key)
  281. : "memory", "cc", "0" );
  282. }
  283. /*
  284. * Key expansion, 192-bit case
  285. */
  286. static void aesni_setkey_enc_192( unsigned char *rk,
  287. const unsigned char *key )
  288. {
  289. asm( "movdqu (%1), %%xmm0 \n\t" // copy original round key
  290. "movdqu %%xmm0, (%0) \n\t"
  291. "add $16, %0 \n\t"
  292. "movq 16(%1), %%xmm1 \n\t"
  293. "movq %%xmm1, (%0) \n\t"
  294. "add $8, %0 \n\t"
  295. "jmp 2f \n\t" // skip auxiliary routine
  296. /*
  297. * Finish generating the next 6 quarter-keys.
  298. *
  299. * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
  300. * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
  301. *
  302. * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
  303. * and those are written to the round key buffer.
  304. */
  305. "1: \n\t"
  306. "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
  307. "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
  308. "pslldq $4, %%xmm0 \n\t" // etc
  309. "pxor %%xmm0, %%xmm2 \n\t"
  310. "pslldq $4, %%xmm0 \n\t"
  311. "pxor %%xmm0, %%xmm2 \n\t"
  312. "pslldq $4, %%xmm0 \n\t"
  313. "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
  314. "movdqu %%xmm0, (%0) \n\t"
  315. "add $16, %0 \n\t"
  316. "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
  317. "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
  318. "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
  319. "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
  320. "movq %%xmm1, (%0) \n\t"
  321. "add $8, %0 \n\t"
  322. "ret \n\t"
  323. "2: \n\t"
  324. AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
  325. AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
  326. AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
  327. AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
  328. AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
  329. AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
  330. AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
  331. AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t"
  332. :
  333. : "r" (rk), "r" (key)
  334. : "memory", "cc", "0" );
  335. }
  336. /*
  337. * Key expansion, 256-bit case
  338. */
  339. static void aesni_setkey_enc_256( unsigned char *rk,
  340. const unsigned char *key )
  341. {
  342. asm( "movdqu (%1), %%xmm0 \n\t"
  343. "movdqu %%xmm0, (%0) \n\t"
  344. "add $16, %0 \n\t"
  345. "movdqu 16(%1), %%xmm1 \n\t"
  346. "movdqu %%xmm1, (%0) \n\t"
  347. "jmp 2f \n\t" // skip auxiliary routine
  348. /*
  349. * Finish generating the next two round keys.
  350. *
  351. * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
  352. * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
  353. *
  354. * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
  355. * and those have been written to the output buffer.
  356. */
  357. "1: \n\t"
  358. "pshufd $0xff, %%xmm2, %%xmm2 \n\t"
  359. "pxor %%xmm0, %%xmm2 \n\t"
  360. "pslldq $4, %%xmm0 \n\t"
  361. "pxor %%xmm0, %%xmm2 \n\t"
  362. "pslldq $4, %%xmm0 \n\t"
  363. "pxor %%xmm0, %%xmm2 \n\t"
  364. "pslldq $4, %%xmm0 \n\t"
  365. "pxor %%xmm2, %%xmm0 \n\t"
  366. "add $16, %0 \n\t"
  367. "movdqu %%xmm0, (%0) \n\t"
  368. /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
  369. * and proceed to generate next round key from there */
  370. AESKEYGENA xmm0_xmm2 ",0x00 \n\t"
  371. "pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
  372. "pxor %%xmm1, %%xmm2 \n\t"
  373. "pslldq $4, %%xmm1 \n\t"
  374. "pxor %%xmm1, %%xmm2 \n\t"
  375. "pslldq $4, %%xmm1 \n\t"
  376. "pxor %%xmm1, %%xmm2 \n\t"
  377. "pslldq $4, %%xmm1 \n\t"
  378. "pxor %%xmm2, %%xmm1 \n\t"
  379. "add $16, %0 \n\t"
  380. "movdqu %%xmm1, (%0) \n\t"
  381. "ret \n\t"
  382. /*
  383. * Main "loop" - Generating one more key than necessary,
  384. * see definition of mbedtls_aes_context.buf
  385. */
  386. "2: \n\t"
  387. AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
  388. AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
  389. AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
  390. AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
  391. AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
  392. AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
  393. AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
  394. :
  395. : "r" (rk), "r" (key)
  396. : "memory", "cc", "0" );
  397. }
  398. /*
  399. * Key expansion, wrapper
  400. */
  401. int mbedtls_aesni_setkey_enc( unsigned char *rk,
  402. const unsigned char *key,
  403. size_t bits )
  404. {
  405. switch( bits )
  406. {
  407. case 128: aesni_setkey_enc_128( rk, key ); break;
  408. case 192: aesni_setkey_enc_192( rk, key ); break;
  409. case 256: aesni_setkey_enc_256( rk, key ); break;
  410. default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH );
  411. }
  412. return( 0 );
  413. }
  414. #endif /* MBEDTLS_HAVE_X86_64 */
  415. #endif /* MBEDTLS_AESNI_C */